Trách nhiệm chính

Design and optimize embedded memory circuits including SRAM, ROM, and Register File blocks for advanced process nodes
Lead bitcell development from concept through characterization, including transistor-level simulation, corner analysis, and reliability validation
Supervise and collaborate with layout engineers to ensure design intent is maintained through physical implementation
Work with CAD and compiler teams to integrate memory designs into automated generation flows and verification environments
Drive yield and performance improvements by analyzing silicon data, identifying failure modes, and iterating on design or test methodologies
Mentor junior engineers on circuit design techniques, simulation best practices, and design-for-manufacturability principles

Yêu cầu công việc

Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related technical discipline
2+ years of hands-on experience in embedded CMOS memory design, with a focus on SRAM, ROM, or Register File development
Deep expertise in SRAM bitcell design, including read/write stability analysis, leakage optimization, and statistical variation modeling
Proficiency with circuit simulation tools such as HSPICE or Spectre, and layout tools for design review and verification
Strong scripting skills in C-Shell and Perl for automation and data analysis
Fluency in English and Vietnamese for technical communication and collaboration across global teams

Yêu cầu ưu tiên

Mức lương

Your recruiter will provide more details about the salary range and benefits during the hiring process.

Phúc lợi

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.

Thông tin khác

R&D Engineering, Sr Engineer