Design Verification Engineer (Fresher)
Về công việc
Trách nhiệm chính
- Responsible for Verification from Verification Strategy, Testbench Development, Verification Item List to Simulation, Coverage Analysis.
- Verification Strategy/Test Plan Development: Create Strategy/Plan based on Design specification/Micro Architecture.
- Testbench Development, Simulation/Debugging to identify and resolve any issues/failures of the design.
- Work closely with Synthesis/PD teams to address any defects in Netlist, Timing SDF and ensure specifications are met.
- Coverage analysis to detect uncovered areas that need further testing.
- Documentation and reporting for progress tracking, detailed feedback to design teams, verification result.
Yêu cầu
- New graduate student (fresh graduate).
- Major in Electrical – Electronics, Electronics and Telecommunication, Computer engineering Technology.
- Has thesis, essay, investigation related to VLSI, VHDL, System Verilog, Synthesis, Design For Test, Physical Design.
- Experience in testbench development in SV-UVM.
- Experience in verification plan creation from specification.
- Experience in the test case and functional coverage development in SV-UVM.
- Basic C/C++.
- Perl/python scripting.
- Good at English and presentation.
Yêu cầu ưu tiên
- Internship course at Semiconductor Design Companies is a plus.
Thông tin khác
- At Quest Global, it’s not just what we do but how and why we do it that makes us different.
- We are known for our extraordinary people who make the impossible possible every day.
- We wholeheartedly believe in the diversity of thought that comes with fostering a culture rooted in respect, where everyone belongs, is valued, and feels inspired to share their ideas.
- We know embracing our unique differences makes us better, and that solving the worlds hardest engineering problems requires diverse ideas, perspectives, and backgrounds.
- We shine the brightest when we tap into the many dimensions that thrive across over 21,000 difference-makers in our workplace.